Audio Control FOUR.1i Specifications Page 3

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SIMPLIFIED BLOCK DIAGRAM
I CSerial
2
ControlBus
VoltageSupplies
RIGHT_LOP_A
RIGHT_LOM_A
LEFT_LOP_A
LEFT_LOM_A
MONO_LOP_A
MONO_LOM_A
HPROUT_A
HPRCOM_A
HPLCOM_A
HPLOUT_A
Mixing,
Muxing,
Volume
Controls
Mixing,
Muxing
LINE2LP_A
LINE2LM_A
LINE2RP_A
LINE2RM_A
LINE1LP_A
LINE1LM_A
LINE1RP_A
LINE1RM_A
MIC3R_A
MIC3L_A
PGA
0/+59.5dB
0.5dBsteps
PGA
0/+59.5dB
0.5dBsteps
ADC
ADC
DAC
DAC
VolumeCtl
andEffects
VolumeCtl
andEffects
RIGHT_LOP_B
RIGHT_LOM_B
LEFT_LOP_B
LEFT_LOM_B
MONO_LOP_B
MONO_LOM_B
HPROUT_B
HPRCOM_B
HPLCOM_B
HPLOUT_B
Mixing,
Muxing,
Volume
Controls
Mixing,
Muxing
LINE2LP_B
LINE2LM_B
LINE2RP_B
LINE2RM_B
LINE1LP_B
LINE1LM_B
LINE1RP_B
LINE1RM_B
MIC3R_B
MIC3L_B
PGA
0/+59.5dB
0.5dBsteps
PGA
0/+59.5dB
0.5dBsteps
ADC
ADC
DAC
DAC
VolumeCtl
andEffects
VolumeCtl
andEffects
Reset,
GPIO
Bias,
Detect
AudioSerial
DataBus A
Reset,GPIO
Bias,
Detect
AudioSerial
DataBus A
PLL
PLL
SDA
SCL
WCLK_A
BCLK_A
DOUT_A
DIN_A
MCLK_A
MICBIAS_A
ADDR_A
GPIO2_A
GPIO1_A
RESETB_A
IOVDD
DVSS
DVDD
A
VSS_ADC
DRVSS
DRVDD
AVSS_DAC
AVDD_DAC
ADDR_B
GPIO2_B
GPIO1_B
RESETB_B
WCLK_B
BCLK_B
DOUT_B
DIN_B
MCLK_B
MICBIAS_B
MICDET_B
MICDET_A
B0232-01
Block A Codec
BlockBCodec
TLV320AIC34
SLAS538A OCTOBER 2007 REVISED NOVEMBER 2007
PACKAGING/ORDERING INFORMATION
(1)
PACKAGE OPERATING ORDERING TRANSPORT
PRODUCT PACKAGE DESIGNATOR TEMPERATURE NUMBER MEDIA, QUANTITY
RANGE
TLV320AIC34IZAS Trays, 490
TLV320AIC34 BGA-87 ZAS 40 ° C to 85 ° C
TLV320AIC34IZASR Tape and reel, 2500
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TLV320AIC34
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