Audio Control FOUR.1i Specifications Page 7

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TLV320AIC34
SLAS538A OCTOBER 2007 REVISED NOVEMBER 2007
Table 2. TERMINAL FUNCTIONS, NUMERIC (continued)
TERMINAL
I/O DESCRIPTION
BGA BALL NAME
F4 AVSS_DAC Analog DAC ground supply, 0 V
F8 DVSS Digital core / I/O ground supply, 0 V
F10 LINE2RP_A I MIC2 or Line2 analog input (right plus or multifunction) A
F11 LINE2RP_B I MIC2 or Line2 analog input (right plus or multifunction) B
G1 RESET_B I Reset B
G2 RESET_A I Reset A
G4 AVSS_DAC Analog DAC ground supply, 0 V
G8 DVSS Digital core / I/O ground supply, 0 V
G10 LINE2LM_A I MIC2 or Line2 analog input (left minus or multifunction) A
G11 LINE2LM_B I MIC2 or Line2 analog input (left minus or multifunction) B
General-purpose input/output #2 (input/output) / digital microphone data input / PLL clock
H1 GPIO2_B I/O
input / audio serial data bus bit clock input/output B
General-purpose input/output #2 (input/output) / digital microphone data input / PLL clock
H2 GPIO2_A I/O
input / audio serial data bus bit clock input/output A
H4, H5, H6 DVSS Digital core / I/O ground supply, 0 V
H7 IOVDD I/O voltage supply, 1.1 V 3.6 V
H8 DVSS Digital core / I/O ground supply, 0 V
H10 LINE2LP_A I MIC2 or Line2 analog input (left plus or multifunction) A
H11 LINE2LP_B I MIC2 or Line2 analog input (left plus or multifunction) B
J1 GPIO1_B I/O General-purpose input/output #1 B
J2 GPIO1_A I/O General-purpose input/output #1 A
J10 LINE1RM_A I MIC1 or Line1 analog input (right minus or multifunction) A
J11 LINE1RM_B I MIC1 or Line1 analog input (right minus or multifunction) B
K1 DVDD Digital core voltage supply, 1.65 V 1.95 V
K2 MCLK_A I Master clock input A
K3 BCLK_A I/O Audio serial data bus bit clock (input/output) A
K4 WCLK_A I/O Audio serial data bus word clock (input/output) A
K5 DIN_A I Audio serial data bus data input (input) A
K6 DOUT_A O Audio serial data bus data output (output) A
K7 IOVDD I/O voltage supply, 1.1 V 3.6 V
K8 LINE1LP_B I MIC1 or Line1 analog input (left plus or multifunction) B
K9 LINE1LP_A I MIC1 or Line1 analog input (left plus or multifunction) A
K10 LINE1RP_A I MIC1 or Line1 analog input (right plus or multifunction) A
K11 LINE1RP_B I MIC1 or Line1 analog input (right plus or multifunction) B
L1 MCLK_B I Master clock input B
L2 BCLK_B I/O Audio serial data bus bit clock (input/output) B
L3 WCLK_B I/O Audio serial data bus word clock (input/output) B
L4 DIN_B I Audio serial data bus data input (input) B
L5 DOUT_B O Audio serial data bus data output (output) B
L6 SDA I/O I
2
C serial data input/output
L7 ADDR_A I I
2
C address control A
L8 ADDR_B I I
2
C address control B
L9 SCL I/O I
2
C serial clock
L10 LINE1LM_A I MIC1 or Line1 analog input (left minus or multifunction) A
L11 LINE1LM_B I MIC1 or Line1 analog input (left minus or multifunction) B
Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TLV320AIC34
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