TLV320AIC34
SLAS538A – OCTOBER 2007 – REVISED NOVEMBER 2007
Page 0 / Register 38: High-Power Output Driver Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D6 R 00 Reserved. Write only zeros to these register bits.
D5 – D3 R/W 000 HPRCOM_x Output Driver Configuration Control
000: HPRCOM_x configured as differential of HPROUT_x
001: HPRCOM_x configured as constant VCM output
010: HPRCOM_x configured as independent single-ended output
011: HPRCOM_x configured as differential of HPLCOM_x
100: HPRCOM_x configured as external feedback with HPLCOM_x as constant VCM output
101 – 111: Reserved. Do not write these sequences to these register bits.
D2 R/W 0 Short-Circuit Protection Control
0: Short-circuit protection on all high-power output drivers is disabled.
1: Short-circuit protection on all high-power output drivers is enabled.
D1 R/W 0 Short-Circuit Protection-Mode Control
0: If short-circuit protection is enabled, it limits the maximum current to the load.
1: If short-circuit protection is enabled, it powers down the output driver automatically when a short is
detected.
D0 R 0 Reserved. Write only zero to this register bit.
Page 0 / Register 39: Reserved Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D0 R 0000 0000 Reserved. Do not write to this register.
Page 0 / Register 40: High-Power Output Stage Control Register
READ/ RESET
BIT DESCRIPTION
WRITE VALUE
D7 – D6 R/W 00 Output Common-Mode Voltage Control
00: Output common-mode voltage = 1.35 V
01: Output common-mode voltage = 1.5 V
10: Output common-mode voltage = 1.65 V
11: Output common-mode voltage = 1.8 V
D5 – D4 R/W 00 LINE2L Bypass Path Control
00: LINE2L bypass is disabled.
01: LINE2L bypass uses LINE2LP_x single-ended.
10: LINE2L bypass uses LINE2LM_x single-ended.
11: LINE2L bypass uses LINE2LP_x and LINE2LM_x differentially.
D3 – D2 R/W 00 LINE2R Bypass Path Control
00: LINE2R bypass is disabled.
01: LINE2R bypass uses LINE2RP_x single-ended.
10: LINE2R bypass uses LINE2RM_x single-ended.
11: LINE2R bypass uses LINE2RP_x and LINE2RM_x differentially.
D1 – D0 R/W 00 Output Volume Control Soft-Stepping
00: Output soft-stepping = one step per sample period
01: Output soft-stepping = one step per two sample periods
10: Output soft-stepping disabled
11: Reserved. Do not write this sequence to these register bits.
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